The present invention relates in general to the formation of titanium silicide interconnects, and, more particularly, to a method of forming titanium silicide interconnects having a thin layer of titanium nitride around the titanium silicide.
In the manufacture of integrated circuits used in the construction of dynamic random access memories (DRAMs), static random access memories (SRAMs), and the like, interconnects are required to provide the necessary electrical paths between field effect transistors and other devices fabricated on the semiconductor substrate and the external circuitry used to pass data to and from these devices. Titanium silicide (TiSi.sub.2) is commonly used in the formation of such interconnects because of its relatively low resistivity.
Process steps that occur after the deposition and patterning of the TiSi.sub.2 can adversely affect the electrical performance of the interconnect. For example, TiSi.sub.2 is susceptible to oxidation at high temperatures resulting in the formation of a thin layer of titanium dioxide (TiO.sub.2) on the TiSi.sub.2. Such TiO.sub.2 layers increase the sheet resistance of the interconnect thereby increasing power dissipation and reducing the speed of the device. As used herein, sheet resistance is an electrical quantity measured on a thin layer and has the units of ohms/square. Further, such TiO.sub.2 layers make it difficult to form good electrical contacts on the TiSi.sub.2 interconnect and pose adhesion problems when subsequent layers are deposited on top of the interconnect line.
The TiSi.sub.2 interconnect is also susceptible to grain boundary grooving which increases the resistivity of the interconnect. Grain boundary grooving occurs during high temperature process steps subsequent to the formation of the TiSi.sub.2 interconnect which may progress to a discontinuous interconnect and a failed device. Such a condition is known as agglomeration.
Accordingly, there is a need for a method of forming a titanium silicide interconnect which exhibits greater thermal and chemical stability during subsequent processing steps and which does not degrade the electrical properties of the titanium silicide interconnect. Preferably, such a method would be easy to implement and would not entail excess processing steps.